Assistance with Communication System Homework Involving LTE
The LTE system is supposed to work like this. First, we took a bitstream of 2,097,152 bits, and we encrypted it using an MSRG with the polynomial x19 + x5 + x2 + x. Afterward, we mapped every 2 bits of the encrypted bitstream to the QPSK constellation diagram with respect to the standard TS 36.211 V8.9.0 Section 7.1.2 (image 1). Next, in this communication system homework solution, we transformed the symbol from being in series to parallel. We didn’t need to account for multiple users sharing the bandwidth because we only used one bitstream data for this project. With this parallel symbol, we can take the IFFT for the 1024 subcarriers. Then after we get the symbol, we add the last part of the signal to the beginning, giving us a cyclic prefix. Finally, we upconvert the frequency of each of the symbols to that of a subcarrier.
Transferring Data as a Part of Assistance with Communication System Assignment
What is an LTE system? LTE stands for Long-Term Evolution and is currently one of the biggest methods in transferring data to an internet protocol system. Rather than using small amounts of data for transfer, LTE mobilizes large packets of data at a time. For instance, our LTE implementation requires us to transfer over 2 million bits. Moving the data around and encrypting it all in an orderly fashion. For our communication system assignment help service, we used Matlab to simulate an LTE system and run a given test sequence to attain a specific output. Below is a flow diagram representing each of the steps.
Functional Flow Diagram of the System:
- Input binary bitstream
- Apply encryption function
- Mapping results to QPSK symbols
- Convert serial to parallel
- Map complex symbols to the input of IFFT
- Perform IFFT
- Convert for parallel to serial
- Add cyclic prefix
- Perform up-conversion
Description of each component of the system:
- Binary bitstream was our input data, which was given to us as 2,097,152 bits to simulate an LTE system. This data consists of random patterns of 1’s and 0’s.
- The encryption component of the system takes the binary bitstream of data and converts it into a different variation of 1’s and 0’s using, in this case, MSRG implementation. The purpose of this is to conceal the original message and create an entirely new data stream using the given polynomial (x19 + x5 + x2 + x) as the ‘key.’ This was accomplished through MatLab/Python. Xor gates are implemented in registers in correspondence to the power of x with the exception to the highest power (register 5, 3, 2, 1). These Xor gates would determine the outcome of the shift of the next register XORing with the output. If no xor gates exist in the register, then the value of that specific register becomes the value of the next register in the next state. Due to the nature of the polynomial having the highest power of 19, the encryption length is roughly around 500,000 bits long, so the encryption is applied multiple times to encompass the entirety of the 2 million+ bits.
- For mapping the results into QPSK symbols, what this entails is grouping the 2 million+ encrypted bits into pairs. With each pair of bits, using the modulation table given to us by the book (table 7.1.2), which can also be found below, and will be used to apply the corresponding phase shift based on the QPSK symbol.
- Converting from serial to parallel takes the even bits and odd bits and separates the two. Once they are separated, evens are multiplied by cos, and odds are multiplied by sin. After that operation, we sum the two results together and then return it.
- The purpose of mapping the complex symbols that were arranged in parallel is to convert from the frequency domain into the time domain so that the input is appropriate for performing IFFT.
- Using MatLab built-in-function, IFFT is performed on our data. In this step, we convert the complex symbols into complex time samples, hence the conversion into the time domain. The symbol width being converted at a time is 1024 bits (divide by N = 1024). What this implies is multiple conversions are applied in multiples of 1024 (mod1024).
- The parallel to the serial port is the same process as converting it from serial to parallel but in the opposite way. In order to do this, we have to split the input back based on evens and odd bits. For each even bit, we do an inverse cos, which will convert back the bits to serial, and we do the same thing with odd bits except with inverse sine.
- We take the last 68.4 micro-seconds and add it to the beginning of each symbol in order to prevent message loss and utilize time being wasted when transmitting and receiving the information for increased security.
- To perform up-conversion, we convert our digital data into analog data and multiply it by a specific frequency to apply the phase shift we desire, which is based on QPSK.